![]() Unless you need it, stick with v3 and save a few bucks! That's why v4 is down here and v3 is still on top of the page. Design history and work product, see it come to lifeīus Blaster v4 is a redesign of v3/v2 that supports SWV, an obscure extension to a reduced pincount JTAG protocol most people will never use.Bus Blaster v2 & v3 buffer logic makes Bus Blaster compatible with jtagkey, KT-link, and several other programmer types.Swapped FT2232 clock output to CPLD pin with global clock feature for potential logic analyzer mode.Added series resistors to input and output pins to protect against damage and noise.Fitted in a DP8049 (80x49 mm) standard PCB, case available here.Each unit is tested with a real JTAG target before it ships.īus Blaster v4 has some features advanced users need, but most people only need v3! Bus Blaster v4 is available NOW for $45.īus Blaster v3 is a minor update to v2. ![]() Mini-CPLD development board: self programmable, extra CPLD pins to headerīus Blaster v3 is available NOW for $35.Should support Serial Wire Debug when available.Compatible with 'jtagkey', 'KT-link' programmer settings in OpenOCD, urJTAG, and more.Reprogrammable buffer is compatible with multiple debugger types.Buffered interface works with 3.3volt to 1.5volt targets.Based on FT2232H with high-speed USB 2.0.Thanks to a reprogrammable buffer, a simple USB update makes Bus Blaster v2 compatible with many different JTAG debugger types in the most popular open source software. Bus Blaster is an experimental, high-speed JTAG debugger for ARM processors, FPGAs, CPLDs, flash, and more.
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